(1) Field of the Invention
The present invention generally relates to delay circuits, and more particularly to a voltage (or current) controlled delay circuit capable of generating a delayed signal having an adjustable delay time based on a phase difference between a reference signal and the delayed signal.
(2) Description of the Prior Art
Of the physical quantities which can be handled by semiconductor devices, a voltage generated by a band gap reference circuit and a frequency oscillated by a crystal oscillator circuit are stable physical quantities. The band gap reference circuit and the crystal oscillator circuit are designed to remove temperature dependence and voltage dependence of semiconductor elements. The voltage and frequency generated by these circuits are widely used for various applications. Recently, there has been considerable activity in the development of signal generators using crystal oscillator circuits. Particularly, a signal generator which utilizes the crystal oscillator circuit and a PLL (Phase Locked Loop) circuit has been advanced. Such a signal generator is capable of generating arbitrary frequencies or stabilizing a circuit having low stability by locking it with the precision of the crystal oscillator circuit.
The combination of the crystal oscillator circuit and the PLL circuit can define a stable operation timing. This stable operation timing is used for example, for a shift register. The shift register shifts data in synchronism with a predetermined timing corresponding to a rise or fall of a shift clock. When the shift clock is stabilized, the shift register delays the data precisely.
It should be noted that the stable timing defined by the combination of the crystal oscillator circuit is synchronized with a clock signal generated by the crystal oscillator circuit. Thus, it is impossible to operate the shift register in asynchronism (i.e., asynchronously) with the clock signal generated by the crystal oscillator circuit.